This application is based on Application No. 10-026658 filed in Japan, the contents of which is hereby incorporated by reference.
1. Field of the Invention
The present invention relates to image processing apparatuses and more particularly to an image processing apparatus for carrying out binarization using the error diffusion method.
2. Description of the Related Art
In the field of image processing, the technique of converting image data of continuous multiple gradation levels (multiple values) into binary data consisting of xe2x80x9c0sxe2x80x9d and xe2x80x9c1sxe2x80x9d is conventional known.
FIG. 15 is a block diagram showing a structure of an image processing apparatus adapting such a technique.
Referring to the figure, the image processing apparatus includes an MPU 501 for controlling the entire apparatus, an operation panel 502 for receiving user inputs, a readout sensor 503 formed of a photoelectric device such as a CCD and a driving system thereof, an A/D conversion circuit 504 for digitally converting an output from the readout sensor, a Log conversion circuit 505 for carrying out Log conversion of a digital signal, an MTF correction circuit 506 for carrying out sharpness correction, a gamma correction circuit 507 for carrying out gamma correction, a binarization circuit 508 for binarizing gamma-corrected data, and a printer (image recording device) 509.
Readout sensor 503 scans a mixed format original of a gradation image and line copy image, for example, and produces a sampling analog signal. A/D conversion circuit 504 quantizes the sampling analog signal as gradation data where one pixel has a value of 8 bits (256 gradation levels), for example.
Log conversion circuit 505 calculates 8-bit gradation density data which has a log relationship with the gradation data from the gradation data. Sharpness correction circuit 506 corrects the sharpness of a gradation density data image using a digital filter such as a Laplacian filter.
Gamma correction circuit 507 corrects a difference in the gradation curve between readout sensor 503 and printer 509 to implement desired gamma characteristics as the entire image processing apparatus or to set gamma characteristics desired by users. Specifically, gamma correction circuit 507 has a lookup table (LUT) RAM of approximately 8 bits (256 words). MPU1 sets nonlinear gamma correction data in lookup table RAM and carries out gamma correction.
Binarization circuit 508 uses an area gradation binarization method such as the error diffusion binarization method to convert 8-bit gradation density data that is gamma-corrected into 1-bit binary data according to each light/dark level. The converted 1-bit binary data is printed on a recording medium by printer 509. Printer 509 is an electronic photo printer or an ink jet printer, for example.
The error diffusion binarization method carried out in binarization circuit 508 calculates a density difference (binarization error) for each pixel between an input image density and an output image density and diffuses the calculation result, which is provided with particular weights, to peripheral pixels. This method is reported in R. W. Floyd, L. Steinberg xe2x80x9cAn adaptive algorithm for spatial gray scalexe2x80x9d SID. 17, pp. 75-77 (1976).
FIG. 16 is a block diagram showing a specific structure of binarization circuit 508 in FIG. 15. Here, binarization circuit 508 converts an 8-bit (256-gradation) input multi-valued image into a 1-bit (binary) image.
Referring to the figure, binarization circuit 508 includes an adder 601, a comparator 602, a selector 603, a subtracter 604, an error memory 605, and an error weighting filter 606.
Adder 601 adds a binarization error that is weight-averaged by error weighting filters 606 to a density value of a pixel of interest (*) of an input multi-valued image. Thus, the error is corrected. When the density value of an input image is 8 bits, an adder of approximately 10 bits with minus bits included is generally required as adder 601.
Comparator 602 compares a fixed threshold Th and a density value of a pixel of interest of an error-corrected input multi-valued image. A binary output of the pixel of interest is provided according to the comparison result. Specifically, when the density value of a pixel of interest of an error-corrected input multi-valued image is at least threshold Th, xe2x80x9c1xe2x80x9d is output from comparator 602. Otherwise, xe2x80x9c0xe2x80x9d is output. An 8-bit comparator is generally used as comparator 602.
Selector 603 outputs a reference value of either High or Low that is set in advance by MPU 501, for example, according to an output from comparator 602.
Subtracter 604 calculates a difference (that is, a binarization error) between a reference value output from selector 603 and a density value of a pixel of interest of an error-corrected input multi-valued image. A 9-bit subtracter is generally used as subtracter 604.
Error memory 605 has the structure of an FIFO and holds one to several lines of binarization errors. A memory where one word has a width of 9 bits is generally used as the FIFO memory.
Error weighting filter 606 calculates a weighted average value of binarization errors stored in error memory 605. Specifically, binarization errors of pixels peripheral to a pixel of interest (*) are multiplied by the coefficients of {fraction (1/16)}-{fraction (3/16)} as shown in FIG. 16, and the multiplied errors are added together to provide a weighted average value of binarization errors. The weighted average value is added to a density value of a pixel of interest by adder 601. An adder of 9-13 bits is generally required as error weighting filter 606.
FIG. 17 shows an output image sample by the circuit in FIG. 16.
However, the conventional image processing apparatus above has drawbacks described below.
(1) The effect of masking a nonuniform pitch, which causes overlapped or gapped pitches, of a printer is low because output patterns are irregular.
In the case of a laser beam printer, the nonuniform pitch of a printer mainly occurs when the inclination adjustment of a polygon mirror is insufficient or when the stability of paper feed is poor, and the nonuniform pitch occurs vertically to a sub scanning direction. In the case of an ink jet printer, the nonuniform pitch occurs when the accuracy of line feed of a printing head is insufficient or when the stability of paper feed is poor, and it also occurs vertically to a sub scanning direction.
(2) An irregular texture unique to a highlight portion of a photographic image is generated.
This problem is unique to the error diffusion method. An example is found in an irregular dot arrangement (texture) at a lower portion of the image (lower portion of a notebook image) shown in FIG. 17.
(3) A hardware circuit for a feedback process cannot be formed by a synchronous circuit, and a higher speed is difficult to achieve as the number of gradation levels which can be represented is made larger.
Since the processing time of an adder generally becomes longer as the number of bits is larger, the processing speed becomes lower as the bit width of an input multi-valued image is made larger (that is, the number of gradation levels is made larger) in the error diffusion binarization method.
In order to solve the problems of (1) and (2) described above, a method has been proposed which periodically varies a binarization threshold in error diffusion binarization by a dither matrix having a size of Sxc3x97S.
FIG. 18 is a block diagram showing a structure of an image processing apparatus adopting such a method.
This apparatus is different from the apparatus shown in FIG. 16 in that a threshold that is input to comparator 703 is varied by a variable threshold matrix (dither matrix) 702. In other words, this apparatus is formed so that the count values of a main scanning direction counter and a sub scanning direction counter are input to variable threshold matrix 702 and a threshold that is input to comparator 703 is varied as pixels are scanned.
variable threshold matrix 702 has a size of Sxc3x97S=4xc3x974 and the average value of thresholds is xe2x80x9c128xe2x80x9d that is a middle density value when an input multi-valued image has 8 bits.
When a threshold is varied by variable threshold matrix 702 in this manner, a periodic line component is added to both of main/sub scanning directions and a multi-line effect can be obtained vertically to the main scanning direction.
Since addition of a periodic line component (multi-line) vertically to the main scanning direction is effective to mask a nonuniform pitch of a printer, the nonuniform pitch of a printer can be masked to some extent by the circuit shown in FIG. 18.
As a circuit having a similar effect to the circuit in FIG. 18, a technique has been proposed which periodically adds a bias value to a density value of a pixel of an input multi-valued image.
FIG. 19 is a block diagram showing a structure of an image processing apparatus adapting such a technique.
In this apparatus, a periodically increasing/decreasing bias value is added to a density value of a pixel of interest of an input multi-valued image by an adder 801.
The bias values are stored in variable bias value matrix 802. The total of bias values stored in variable bias value matrix 802 is set to xe2x80x9c0.xe2x80x9d In this apparatus, the size of variable bias value matrix 802 is Sxc3x97S=4xc3x974.
FIG. 20 shows an output image sample when a threshold (or bias value) is periodically varied by the image processing apparatus in FIG. 18 or FIG. 19 above.
Since a threshold or bias value is varied by the periodic dither matrix having a size of Sxc3x97S in these apparatuses, a periodic line component is added to both of main/sub scanning directions of an image, and a multi-line effect can be obtained by a component vertical to the main scanning direction. It can be seen from a portion of the image where a notebook is printed on the lower side (a lower portion of the notebook, especially) an irregular dot arrangement (texture) is reduced compared with the image (FIG. 17) processed by the typical error diffusion method.
In the image shown in FIG. 20, however, resolution is slightly lowered in both of the main/sub scanning directions. This is because a periodic component vertical to the sub scanning direction is also unnecessarily added, although a periodic component vertically to the main scanning direction has only to be added to attain a line effect.
In any of the apparatuses shown in FIGS. 18 and 19 above, the bit width of an input multi-valued image is the same as in the apparatus shown in FIG. 16, and therefore the apparatuses cannot have a higher operating speed.
As an apparatus for solving the problems (1)-(3) described above, an image processing apparatus having the structure shown in FIG. 21 has been proposed.
In this apparatus, an 8-bit input multi-valued image, for example, is made a 4-bit multi-valued dither image, for example, by a dither matrix with a size of Sxc3x97S, and the image is further subjected to error diffusion binarization. Since a dither component is added in the process of multi-value dithering, and error diffusion binarization is carried out with the bit number approximately half the conventional number according to the circuit, an irregular texture can be reduced, a higher speed of the apparatus can be attained, and lower cost of the apparatus can be achieved by reducing memories.
Referring to FIG. 21, the gradation conversion table 901 is an 8 bitxe2x86x928 bit gradation conversion table formed of an ROM, for example. When the error diffusion binarization process to be carried out at a subsequent stage is performed on an input 4-bit image, hexadecimal values from 00h to FFh that can be taken by the image are rounded to values from 00h to F0h by gradation conversion table 901.
A threshold matrix 902 outputs a threshold according to addresses given by a main scanning direction counter (that increments from 0 to 3 and is reset at 4) and a sub scanning direction counter (that increments from 0 to 3 and is reset at 4).
A comparator 903 compares the threshold from threshold matrix 902 and the value of less significant 4 bits (density value L4) of the 8-bit image that has the rounded value of F0h at most. When the value of least significant 4 bits is equal to or larger than the threshold, xe2x80x9c1xe2x80x9d is output. Otherwise, xe2x80x9c0xe2x80x9d is output.
An adder 904 adds more significant 4 bits of the 8-bit image data that takes the value of F0h at most and an output from comparator 903.
This output becomes a 4-bit multi-valued dither image and it is input to an adder 905. After adder 905, the same process as in FIG. 16 is performed.
FIG. 22 is a diagram for describing the function of threshold matrix 902 in FIG. 21. In the figure, a white circle indicates a pixel of which output is xe2x80x9c0xe2x80x9d and a black circle indicates a pixel of which output is xe2x80x9c1.xe2x80x9d
FIG. 22 shows a case where density value L4 that is input to comparator 903 is xe2x80x9c0xe2x80x9d-xe2x80x9c15xe2x80x9d for all pixels. When density value L4 is at least a corresponding threshold of the threshold matrix (dither matrix), xe2x80x9c1xe2x80x9d is obtained. Otherwise, xe2x80x9c0xe2x80x9d is obtained. Accordingly, as density value L4 increases, a pixel to be xe2x80x9c1xe2x80x9d increases outward from the matrix center. In short, the dither matrix is arranged in a dot concentration manner.
FIG. 23 shows a sample image output from the apparatus in FIG. 21. It can be seen from a portion where a notebook is printed on the lower side of the image (a lower portion of the notebook) that an irregular dot arrangement (texture) is reduced compared with the image, shown in FIG. 17, processed by the typical error diffusion method.
Since the Sxc3x97S dither matrix is still adopted even when such an apparatus is used, however, a periodic component vertical to a sub scanning direction is also unnecessarily added.
FIG. 24 lists problems with the above described image processing apparatuses. When the typical error diffusion method shown in FIG. 16 is adopted, a texture expression at a highlight portion of an image is unsatisfactory, and the effect of masking a nonuniform pitch of a printer is not attained. Since a dither matrix is not adopted, however, resolution in a sub scanning direction is not lowered. Since a large bit width is required at all stages of image processing, problems with the processing speed and the memory cost are caused.
When the method of periodically varying a threshold as shown in FIG. 18 or the method of periodically adding a bias value as shown in FIG. 19 is adopted, an irregular texture at a highlight portion is improved by a dither matrix, and a nonuniform pitch of a printer is masked by the multi-line effect. However, resolution in a sub scanning direction is lowered by the dither matrix. Further, improvement over the typical error diffusion method is not attained in terms of the processing speed and the memory cost.
When the multi-valued dither error diffusion method shown in FIG. 21 is adopted, the effects of masking an irregular texture at a highlight portion and a nonuniform pitch of a printer are attained. However, resolution in a sub scanning direction is still lowered by the dither matrix. When the multi-valued dither matrix diffusion method is used, however, the number of gradation levels is reduced at the first stage, and therefore the processing speed is increased and the memory cost becomes lower.
However, by adopting any of the above described methods, an image processing apparatus capable of improving a highlight texture, nonuniform pitch masking, and resolution in a sub scanning direction could not be provided. Further, an image processing apparatus capable of providing good results in all of a highlight texture, nonuniform pitch masking, resolution in a sub scanning direction, processing speed, and memory cost could not be provided.
Accordingly, an object of the present invention is to provide an image processing apparatus capable of providing superior results in all of a texture at a highlight portion, nonuniform pitch masking, and resolution in a sub scanning direction. Another object of the present invention is to provide an image processing apparatus providing superior results in terms of the processing speed and the memory cost.
In order to attain the objects described above, an image processing apparatus according to one aspect of the present invention includes a binarization circuit for comparing a prescribed threshold and a density value of one pixel of an input image to obtain a density value of a pixel of a corresponding binary output image, an error calculation circuit for calculating as an error a difference between the density value of the one pixel of the input image and the density value of the pixel of the corresponding binary output image, an error diffusion circuit for diffusing the calculated error to pixels peripheral to the pixel of the input image, and a variation circuit for periodically varying the threshold by a dither matrix, the dither matrix having its first periodic component vertical to a main scanning direction stronger than its periodic component vertical to a sub scanning direction.
According to another aspect of the present invention, an image processing apparatus includes a binarization circuit for comparing a prescribed threshold and a density value of one pixel of an input image to obtain a density value of a pixel of a corresponding binary output image, an error calculation circuit for calculating as an error a difference between the density value of the one pixel of the input image and the density value of the pixel of the corresponding binary output image, an error diffusion circuit for diffusing the calculated error to pixels peripheral to the pixel of the input image, an adding circuit for generating a bias value periodically varied by a dither matrix and adding the bias value to the density value of the pixel of the input image, the dither matrix has its periodic component vertical to a main scanning direction stronger than its periodic component vertical to a sub scanning direction.
According to still another aspect of the present invention, an image processing apparatus includes a gradation conversion circuit for converting an input image having an N-bit gradation into an image having an M-bit gradation using a first threshold where M bits are smaller than N bits, a variation circuit for periodically varying the first threshold by a dither matrix, the dither matrix having its periodic component vertical to a main scanning direction stronger than its periodic component vertical to a sub scanning direction, a binarization circuit for comparing a density value of one pixel of the image having the M-bit gradation and a second threshold to obtain a density value of a pixel of a corresponding binary output image, an error calculation circuit for calculating as an error a difference between the density value of one pixel of the image having the M-bit gradation and the density value of the pixel of the corresponding binary output image, and an error diffusion circuit for diffusing the calculated error to pixels peripheral to the pixel of the image having the M-bit gradation.
According to still another aspect of the present invention, a method of outputting a binary image by processing an input image includes the steps of comparing a prescribed threshold and a density value of one pixel of an input image to obtain a density value of a pixel of a corresponding binary output image, calculating as an error a difference between the density value of the one pixel of the input image and the density value of the pixel of the corresponding binary output image, diffusing the calculated error to pixels peripheral to the pixel of the input image, and periodically varying the threshold by a dither matrix having its periodic component vertical to a main scanning direction stronger than its periodic component vertical to a sub scanning direction.
According to still another aspect of the present invention, a method of outputting a binary image by processing an input image includes the steps of comparing a prescribed threshold and a density value of one pixel of an input image to obtain a density value of a pixel of a corresponding binary output image, calculating as an error a difference between the density value of the one pixel of the input image and the density value of the pixel of the corresponding binary output image, diffusing the calculated error to pixels peripheral to the pixel of the input image, and generating a bias value periodically varied by a dither matrix having its periodic component vertical to a main scanning direction stronger than its periodic component vertical to a sub scanning direction and adding the bias value to the density value of the pixel of the input image.
According to still another aspect of the present invention, a method of outputting a binary image by processing an input image includes the steps of converting an input image having an N-bit gradation into an image having an M-bit gradation using a first threshold where M bits are smaller than N bits, periodically varying the first threshold by a dither matrix having its periodic component vertical to a main scanning direction stronger than its periodic component vertical to a sub scanning direction, comparing a density value of one pixel of the image having the N-bit gradation and a second threshold to obtain a density value of a pixel of a corresponding binary output image, calculating as an error a difference between the density value of the one pixel of the image having the M-bit gradation and the density value of the pixel of the corresponding binary output image, and diffusing the calculated error to pixels peripheral to the pixel of the image having the M-bit gradation.
According to the present invention, image processing that is advantageous for all of the texture at an image highlight portion, the masking effect for a nonuniform pitch, and the resolution in a sub scanning direction can be made possible by a matrix having its periodic component vertical to a main scanning direction stronger than its periodic component vertical to a sub scanning direction.
According to the present invention, an image processing apparatus capable of providing superior results in terms of the processing speed and the memory cost can also be provided.
The foregoing and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.